Recently, integration of circuits on one chip has increased dramatically. In the area of dynamic random access memory (DRAM), memory capacity on one chip has moved beyond the 64 kilobit capacity through the 1 megabit and now into 4 megabits of RAM on one chip. In order to achieve a 4 megabit DRAM on one chip several major problems must be overcome.
Each memory cell in a DRAM at the basic bit level generally comprises one capacitor and one transistor, as shown in FIG. 1, although the actual circuit may vary greatly depending on the desired capacity, materials, etc. In building large capacity DRAMs, capacitors formed in trenches or "trench capacitors" are used in order to reduce the total surface area needed for one cell, thereby to pack the memory cells more densely. Trench capacitors, as known in the art, can be constructed by etching a cylindrical or other shape well or trench into a (usually silicon) wafer substrate, lining the trench with a dielectric layer and filling the remaining volume of the trench with a polysilicon plug. The trench wall and the plug serve as the two plates of the capacitor to store the electrical charge.
There are several tradeoffs required to obtain a high density of trench capacitors. Since the electrical charge of a trench capacitor is stored between the trench wall and the plug, if the trenches are too close together, there may be capacitive coupling between the trench wall of one trench with the trench wall of an adjacent trench. Furthermore, there may also be leakage of current from one trench wall to an adjacent trench wall through the silicon substrate, because a high voltage on one trench wall will tend to cause charge flow through the silicon substrate towards a low voltage on an adjacent trench wall. As a result, trench capacitors generally must be constructed approximately 1.8 microns apart or more.
These problems are well known in the art. In response to them, trench spacing has become a function of substrate doping; that is, the greater the doping of the substrate, the closer together the trenches may be. The high concentration of dopant provides an energy barrier between the trenches. However, if the substrate adjacent to the trench is highly doped, then the substrate under the gate transistor is also highly doped. A high performance pass transistor with low body effect, as is desirable in a high performance memory device, is then very difficult to construct, because the body effect of a transistor increases as the doping of the substrate increases. As a result, the full voltage of the bit line cannot be delivered to the capacitor through a high body effect transistor.
Finally, if one capacitor plate of polysilicon is formed next to a single crystal silicon substrate, a gated diode results, as is well known in the art. Such gated diode generally increases current leakage along and through the sidewall of the trench.
Therefore, it is a general object of this invention to overcome the above-listed problems.
It is a further object of this invention to provide a trench capacitor which requires a minimal amount of etching and fine alignment.
It is a further object of this invention to provide a trench capacitor which may be manufactured using standard processing techniques.